AON6918 25v dual asymmetric n-channel mosfet general description product summary q1 q2 25v 25v i d (at v gs =10v) 60a 85a r ds(on) (at v gs =10v) <5.2m w <1.8m w r ds(on) (at v gs = 4.5v) <7.8m w <2.7m w 100% uis tested 100% rg tested symbol v ds v gs i dm i as , i ar e as , e ar t j , t stg parameter symbol typ q1 typ q2 max q1 max q2 t 10s 25 20 30 25 steady-state 50 45 60 55 steady-state r q jc 3.1 0.9 4 1.2 the AON6918 is designed to provide a high efficienc y synchronous buck power stage with optimal layout an d board space utilization. it includes two specializ ed mosfets in a dual power dfn5x6a package. the q1 "high side" mosfet is designed to minimize switchin g losses. the q2 "low side" mosfet is designed for l ow r ds(on) to reduce conduction losses. the AON6918 is well suited for use in compact dc/dc converter applicati ons. 2 2.2 200 v ds max q1 max q2 parameter absolute maximum ratings t a =25c unless otherwise noted 31 drain-source voltage 25 avalanche energy l=0.1mh c 490 15 60 85 38 i d pulsed drain current c v 20 66 thermal characteristics gate-source voltage 1.3 1.4 104 12.5 41.5 units units 78 80 304 a w a 26.5 v mj avalanche current c continuous drain current a 12 21 40 t c =25c t c =100c continuous drain current g t a =25c i dsm t a =70c t c =25c t c =100c power dissipation b p d power dissipation a p dsm w t a =70c t a =25c junction and storage temperature range -55 to 150 c maximum junction-to-case c/w c/w maximum junction-to-ambient a d r q ja maximum junction-to-ambient a c/w top view bottom view dfn5x6a top view bottom view g1 d1 d1 d1 d1 (s1/d2) g2 s2 s2 s2 pin1 rev0 : aug 2011 www.aosmd.com page 1 of 10
AON6918 symbol min typ max units bv dss 25 v v ds =25v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 1.2 1.7 2.3 v i d(on) 200 a 4.3 5.2 t j =125c 6.6 8 6.2 7.8 m w g fs 70 s v sd 0.7 1 v i s 30 a c iss 1040 1300 1560 pf c oss 370 530 690 pf c rss 10 35 60 pf r g 0.8 1.7 2.6 w q g (10v) 13 17 21.0 nc q g (4.5v) 7.2 nc q gs 3.9 nc q gd 1.8 nc t d(on) 5 ns t r 16 ns t d(off) 20 ns t f 4 ns t rr 16 21 26 ns q rr 31 39 47 nc components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery charge i f =20a, di/dt=500a/ m s maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time turn-off delaytime v gs =10v, v ds =15v, r l =0.75 w , r gen =3 w reverse transfer capacitance turn-off fall time total gate charge v gs =10v, v ds =15v, i d =20a gate source charge gate drain charge total gate charge on state drain current i s =1a,v gs =0v v ds =5v, i d =20a v gs =4.5v, i d =20a forward transconductance diode forward voltage v gs =10v, v ds =5v v gs =10v, i d =20a i dss m a v ds =v gs i d =250 m a v ds =0v, v gs = 20v zero gate voltage drain current gate-body leakage current r ds(on) static drain-source on-resistance i f =20a, di/dt=500a/ m s v gs =0v, v ds =15v, f=1mhz switching parameters body diode reverse recovery time m w gate resistance v gs =0v, v ds =0v, f=1mhz drain-source breakdown voltage i d =250 m a, v gs =0v q1 electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air enviro nment with t a =25c. the power dissipation p dsm is based on r q ja and the maximum allowed junction temperature of 15 0c. the value in any given application depends on the user's specific board design. b. the power dissipation p d is based on t j(max) =150c, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. repetitive rating, pulse width limited by juncti on temperature t j(max) =150c. ratings are based on low frequency and duty cycles to keep initial t j =25c. d. the r q ja is the sum of the thermal impedence from junction to case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =150c. the soa curve provides a single pulse ratin g. g. the maximum current rating is package limited. h. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a still air enviro nment with t a =25c. rev 0 : aug 2011 www.aosmd.com page 2 of 10
AON6918 q1-channel: typical electrical and thermal characteristics 17 52 10 0 18 40 0 20 40 60 80 100 1.5 2 2.5 3 3.5 4 v gs (volts) figure 2: transfer characteristics (note e) i d (a) 3 4 5 6 7 0 5 10 15 20 25 30 i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) r ds(on) (m w ww w ) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 v sd (volts) figure 6: body-diode characteristics (note e) i s (a) 25c 125c 0.8 1 1.2 1.4 1.6 1.8 0 25 50 75 100 125 150 175 temperature (c) figure 4: on-resistance vs. junction temperature (note e) normalized on-resistance v gs =4.5v i d =20a v gs =10v i d =20a 2 4 6 8 10 12 3 4 5 6 7 8 9 10 v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) r ds(on) (m w ww w ) 25c 125c v ds =5v v gs =4.5v v gs =10v i d =20a 25c 125c 0 20 40 60 80 100 120 0 1 2 3 4 5 v ds (volts) fig 1: on-region characteristics (note e) i d (a) v gs =2.5v 4.5v 10v 6v 3v 4v rev 0 : aug 2011 www.aosmd.com page 3 of 10
AON6918 q1-channel: typical electrical and thermal characteristics 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 v ds (volts) i d (amps) figure 9: maximum forward biased safe operating area (note f) 1ms 100us dc r ds(on) limited t j(max) =150c t c =25c 10 m s 10ms 0 2 4 6 8 10 0 5 10 15 20 q g (nc) figure 7: gate-charge characteristics v gs (volts) 0 500 1000 1500 2000 0 5 10 15 20 25 30 v ds (volts) figure 8: capacitance characteristics capacitance (pf) c iss 0 200 400 600 800 1000 0.0001 0.001 0.01 0.1 1 10 pulse width (s) figure 10: single pulse power rating junction-to- case (note f) power (w) 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) z q qq q jc normalized transient thermal resistance c oss c rss v ds =15v i d =20a single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =150c t c =25c r q jc =4c/w rev 0 : aug 2011 www.aosmd.com page 4 of 10
AON6918 q1-channel: typical electrical and thermal characteristics 17 52 10 0 18 40 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 16: normalized maximum transient thermal imp edance (note h) z q qq q ja normalized transient thermal resistance single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 10 100 1000 0.000001 0.00001 0.0001 0.001 time in avalanche, t a (s) figure 12: single pulse avalanche capability (note c) i ar (a) peak avalanche current 0 5 10 15 20 25 30 35 0 25 50 75 100 125 150 t case (c) figure 13: power de-rating (note f) power dissipation (w) 0 10 20 30 40 50 60 70 0 25 50 75 100 125 150 t case (c) figure 14: current de-rating (note f) current rating i d (a) t a =25c 1 10 100 1000 10000 0.00001 0.001 0.1 10 1000 pulse width (s) figure 15: single pulse power rating junction-to- ambient (note h) power (w) t a =25c t a =150c t a =100c t a =125c r q ja =60c/w rev 0 : aug 2011 www.aosmd.com page 5 of 10
AON6918 symbol min typ max units bv dss 25 v v ds =25v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 1.2 1.7 2.3 v i d(on) 490 a 1.5 1.8 t j =125c 2.2 2.8 2.05 2.7 m w g fs 110 s v sd 0.7 1 v i s 85 a c iss 3200 4000 4800 pf c oss 1100 1680 2200 pf c rss 20 65 110 pf r g 0.3 0.7 1.1 w q g (10v) 41 52 63 nc q g (4.5v) 23 nc q gs 9 nc q gd 6 nc t d(on) 7 ns t r 17 ns t d(off) 33 ns t f 7 ns t rr 18 23 28 ns q rr 60 75 90 nc components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. i s =1a,v gs =0v v ds =5v, i d =20a i f =20a, di/dt=500a/ m s switching parameters maximum body-diode continuous current g input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time reverse transfer capacitance v gs =0v, v ds =15v, f=1mhz body diode reverse recovery charge i f =20a, di/dt=500a/ m s turn-off delaytime v gs =10v, v ds =15v, i d =20a gate source charge gate drain charge total gate charge gate resistance v gs =0v, v ds =0v, f=1mhz turn-off fall time total gate charge r ds(on) static drain-source on-resistance i dss m a v ds =v gs i d =250 m a v ds =0v, v gs = 20v zero gate voltage drain current gate-body leakage current m w body diode reverse recovery time drain-source breakdown voltage i d =250 m a, v gs =0v v gs =10v, v ds =5v v gs =10v, i d =20a on state drain current v gs =4.5v, i d =20a forward transconductance diode forward voltage v gs =10v, v ds =15v, r l =0.75 w , r gen =3 w q2 electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air enviro nment with t a =25c. the power dissipation p dsm is based on r q ja and the maximum allowed junction temperature of 15 0c. the value in any given application depends on the user's specific board design. b. the power dissipation p d is based on t j(max) =150c, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. repetitive rating, pulse width limited by juncti on temperature t j(max) =150c. ratings are based on low frequency and duty cycles to keep initial t j =25c. d. the r q ja is the sum of the thermal impedence from junction to case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =150c. the soa curve provides a single pulse ratin g. g. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a still air enviro nment with t a =25c. rev 0 : aug 2011 www.aosmd.com page 6 of 10
AON6918 q2-channel: typical electrical and thermal characteristics 17 52 10 0 18 40 0 20 40 60 80 100 1.5 2 2.5 3 v gs (volts) figure 2: transfer characteristics (note e) i d (a) 1.0 1.5 2.0 2.5 0 5 10 15 20 25 30 i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) r ds(on) (m w ww w ) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 v sd (volts) figure 6: body-diode characteristics (note e) i s (a) 25c 125c 0.8 1 1.2 1.4 1.6 1.8 0 25 50 75 100 125 150 175 temperature (c) figure 4: on-resistance vs. junction temperature (note e) normalized on-resistance v gs =4.5v i d =20a v gs =10v i d =20a 0 1 2 3 4 5 6 2 4 6 8 10 v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) r ds(on) (m w ww w ) 25c 125c v ds =5v v gs =4.5v v gs =10v i d =20a 25c 125c 0 20 40 60 80 100 120 0 1 2 3 4 5 v ds (volts) fig 1: on-region characteristics (note e) i d (a) v gs =2.5v 3.5v 4.5v 10v 3v rev 0 : aug 2011 www.aosmd.com page 7 of 10
AON6918 q2-channel: typical electrical and thermal characteristics 40 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 v ds (volts) i d (amps) figure 9: maximum forward biased safe operating area (note f) 10 m s 1ms dc r ds(on) limited t j(max) =150c t c =25c 100 m s 0 300 600 900 1200 1500 0.0001 0.001 0.01 0.1 1 10 pulse width (s) figure 10: single pulse power rating junction-to- case (note f) power (w) 0 2 4 6 8 10 0 10 20 30 40 50 60 q g (nc) figure 7: gate-charge characteristics v gs (volts) 0 1000 2000 3000 4000 5000 6000 0 5 10 15 20 25 30 v ds (volts) figure 8: capacitance characteristics capacitance (pf) c iss 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) z q qq q jc normalized transient thermal resistance c oss c rss v ds =15v i d =20a single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =150c t c =25c r q jc =1.2c/w 10ms rev 0 : aug 2011 www.aosmd.com page 8 of 10
AON6918 q2-channel: typical electrical and thermal characteristics 17 52 10 0 18 40 10 100 1000 0.000001 0.00001 0.0001 0.001 time in avalanche, t a (s) figure 12: single pulse avalanche capability (note c) i ar (a) peak avalanche current 0.001 0.01 0.1 1 10 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 16: normalized maximum transient thermal imp edance (note g) z q qq q ja normalized transient thermal resistance single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 0 20 40 60 80 100 0 25 50 75 100 125 150 t case (c) figure 14: current de-rating (note f) current rating i d (a) t a =25c 1 10 100 1000 10000 0.00001 0.001 0.1 10 1000 pulse width (s) figure 15: single pulse power rating junction-to- ambient (note g) power (w) t a =25c t a =150c t a =100c t a =125c r q ja =55c/w 0 20 40 60 80 100 120 0 25 50 75 100 125 150 t case (c) figure 13: power de-rating (note f) power dissipation (w) rev 0 : aug 2011 www.aosmd.com page 9 of 10
AON6918 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt ar ar t rr rev 0 : aug 2011 www.aosmd.com page 10 of 10
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